发明名称 COMMUNICATIONS TERMINAL
摘要 <p><P>PROBLEM TO BE SOLVED: To realize a communications terminal with reduced load on an internal microcomputer. <P>SOLUTION: The communication terminal is provided with a PLL circuit 20 for generating a clock signal of which a frequency is switched as occasion demands; a receiving section 18 for receiving a communication signal, based on the clock signal outputted by the PLL circuit; a transmitting section 19 for transmitting a communication signal, according to the clock signal outputted by the PLL circuit; a state machine 17 which performs control processings between the receiving section and the transmitting section; and microcomputers 11-13 which perform control processing of the device as a whole, other than the control processings performed by the state machine. In the communication terminal, the PLL circuit outputs a lock detecting signal to the state machine, indicating that locking has been made to a frequency to be changed, and the state machine automatically starts the next control, in response to the lock detecting signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005328509(A) 申请公布日期 2005.11.24
申请号 JP20050103612 申请日期 2005.03.31
申请人 FUJITSU LTD 发明人 KUROIWA KOICHI;TANIGUCHI SHOJI
分类号 G06F1/04;H04B1/40;H04B7/26;H04M1/00;H04M11/00;(IPC1-7):H04B1/40 主分类号 G06F1/04
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