发明名称 Method and circuit arrangement for resetting an integrated circuit
摘要 The invention relates to a method for resetting at least one circuit part of an integrated circuit, in particular a synchronous semiconductor memory, in which a clock signal and a clock signal that is inverted with respect to the latter are provided in order to clock the integrated circuit, and in which, when a reset condition is present, an item of reset information is coded onto the clock signal or onto the inverted clock signal. The invention also relates to a circuit arrangement for carrying out the method according to the invention, having a clock suppression device and a decoder circuit, which is intended to extract the reset information from the clock signal or from the inverted clock signal.
申请公布号 US2005253638(A1) 申请公布日期 2005.11.17
申请号 US20050117736 申请日期 2005.04.29
申请人 INFINEON TECHNOLOGIES AG 发明人 DIETRICH STEFAN;HEIN THOMAS;HEYNE PATRICK;SCHROGMEIER PETER
分类号 G11C5/14;G11C11/4072;H01L21/82;H03K5/1534;H03L7/00;(IPC1-7):H03L7/00 主分类号 G11C5/14
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