发明名称 |
Self-aligned planar DMOS transistor structure and its manufacturing methods |
摘要 |
A self-aligned planar DMOS transistor structure is disclosed, in which a p-body diffusion region is selectively formed in an n<SUP>-</SUP>/n<SUP>+</SUP> epitaxial silicon substrate; a self-aligned p<SUP>+</SUP> contact diffusion region is formed within the p-body diffusion region through a first self-aligned implantation window surrounded by a first sacrificial dielectric spacer; a self-aligned n<SUP>+</SUP> source diffusion ring is formed in a surface portion of the p-body diffusion region through a second self-aligned implantation window formed between a protection dielectric layer and a self-aligned implantation masking layer surrounded by the sacrificial dielectric spacer; a self-aligned source contact window is formed on the self-aligned n<SUP>+</SUP> source diffusion ring surrounded by a sidewall dielectric spacer and on the self-aligned p<SUP>+</SUP> contact diffusion region surrounded by the self-aligned n<SUP>+</SUP> source diffusion ring; and a heavily-doped polycrystalline-silicon gate layer is selectively silicided in a self-aligned manner.
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申请公布号 |
US6965146(B1) |
申请公布日期 |
2005.11.15 |
申请号 |
US20040997953 |
申请日期 |
2004.11.29 |
申请人 |
SILICON-BASED TECHNOLOGY CORP. |
发明人 |
WU CHING-YUAN |
分类号 |
H01L21/336;H01L29/45;H01L29/49;H01L29/76;H01L29/78;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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