| 摘要 |
PROBLEM TO BE SOLVED: To provide an instruction execution method using a high-performance, RISC-based superscalar processor to be suitably realized by a microprocessor. SOLUTION: A microprocessor for fetching a set of instructions from an instruction store and interpreting and executing the instructions comprises: an instruction set acquisition means for obtaining a predetermined set of instructions to be executed including an instruction to refer to a register; a data store means for storing data in a plurality of registers including a predetermined register and a temporary register; and an execution means that is a means for sequentially executing a predetermined set of instructions, wherein it is instructed to store data processed by an instruction executed out of order in the temporary register, and a register to be referred to by the instruction executed out of order is the predetermined register. COPYRIGHT: (C)2006,JPO&NCIPI
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