发明名称
摘要 A static RAM which is a CMOS static RAM having first and second load transistors, first and second driver transistors, and first and second switching transistors in one memory cell includes: a laminated structure of a first polysilicon layer, a silicide layer and a second polysilicon layer, forming the gate regions of the second load and driver transistors in a body; an interconnection layer comprising a laminated structure of the silicide layer and the second polysilicon layer to form a p-n junction between the drain regions of the first load and driver transistors; and one contact for making the gate regions and the interconnection layer in a body by the second polysilicon layer.
申请公布号 JP3712313(B2) 申请公布日期 2005.11.02
申请号 JP19970210445 申请日期 1997.08.05
申请人 发明人
分类号 H01L21/8244;H01L27/11 主分类号 H01L21/8244
代理机构 代理人
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