发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS REMEDY
摘要 <P>PROBLEM TO BE SOLVED: To remedy at the time of timing failure of a semiconductor integrated circuit after manufactured by providing a variable delay device on a clock signal of the semiconductor integrated circuit. <P>SOLUTION: Variable delay devices VD1 to VD4 are respectively provided on the signal line of a plurality of clocks CT1 to CT4 comprising a clock tree. The variable delay devices VD1 to VD4 are capable of respectively varying the delay value at equal timing with control signals CR1 to CR4. The variation of the delay value of the variable delay devices VD1 to VD4 on the signal line of the arbitrary clock with a timing error occurred remedies a setup error or a hold error existing on the semiconductor integrated circuit after manufactured to certify the predetermined operation. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005303189(A) 申请公布日期 2005.10.27
申请号 JP20040120294 申请日期 2004.04.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YASUI TAKUYA;TAKEOKA SADAMI;ICHINOMIYA TAKAHIRO
分类号 G01R31/28;H01L21/822;H01L27/04;H03K5/13;H03K5/131 主分类号 G01R31/28
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