发明名称 SHIFT REGISTER, DISPLAY DEVICE, IMAGING ELEMENT DRIVING APPARATUS, AND IMAGING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To prevent gradual degradation in the level of a signal to be inputted from each stage of a shift register to the next stage. <P>SOLUTION: A first stage RS1 (1) comprises five n-MOSs 201, 202, 203, 205 and 206. When the level of a signal &Phi;1 becomes a high level, the n-MOS 201 is turned on, Thus, a start signal IN supplied from outside is supplied to the gate of the n-MOS 205 to make the level of a wiring capacity C5 high. The level of the wiring capacity C5 is kept to be high until the n-MOS 201 is turned on next. Thus, the n-MOS 205 keeps an on-state. Since the level of a wiring capacity C2 is also high in this case, an n-MOS 202 is turned on to make the level of a wiring capacity C6 low, and an n-MOS 206 is kept to be in an off state. Thus, while the level of a signal CK1 is high, an output signal OUT1 which is nearly equal to the level of the signal CK1 is outputted from an output terminal OT1. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005302278(A) 申请公布日期 2005.10.27
申请号 JP20050088075 申请日期 2005.03.25
申请人 CASIO COMPUT CO LTD 发明人 KANBARA MINORU
分类号 G02F1/133;G09G3/20;G09G3/36;G11C19/00;G11C19/28;H01L27/146;H03K3/3562;H03K23/44;H04N5/225;H04N5/228;H04N101/00 主分类号 G02F1/133
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