发明名称 |
A memory device using direct access mode test and a method of testing the same |
摘要 |
<p>A memory device includes N pipe line blocks (12,22) for inputting N memory blocks (10,20) and a plurality of data outputs from each of the memory blocks to sequentially output the input data, where N is a natural number, and connects an output line of a ith pipe line block to an input line of a (i + 1)th pipe line block. such that if the device enters a direct access test mode, data sequentially output from an ith pipe line block is input to an (i + 1)th pipe line block, where 1 is a natural number smaller than N. Accordingly, data latched in N pipe line blocks are output using one data output pin, to thereby reduce the number of data output pins used for a direct access mode test to 1/N. <IMAGE></p> |
申请公布号 |
EP0921528(B1) |
申请公布日期 |
2005.10.19 |
申请号 |
EP19980303712 |
申请日期 |
1998.05.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHAI, JOON-WAN;KYUNG, KYE-HYUN |
分类号 |
G01R31/28;G01R31/26;G11C11/401;G11C29/00;G11C29/32;G11C29/48;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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