发明名称 Process for delivering very long instruction words to a processor and integrated circuit with an associated program memory device
摘要 An integrated circuit includes a processor and a program memory device on a common substrate. The memory device is able to deliver to the processor VLIW instructions with at least m operative fields. The memory device comprises: a dictionary memory comprising dictionary instructions each having at least m dictionary elementary instructions; an instructions memory having primary instructions each associated with a VLIW instruction and containing its data, the address of a dictionary instruction, and m masking bits; and m selection devices respectively controlled by the masking bits and each delivering either an NOP instruction, or the dictionary elementary instruction corresponding to the masking bit, so as to reconstruct, by combination with the data of the primary instruction, the VLIW instruction.
申请公布号 US2005228969(A1) 申请公布日期 2005.10.13
申请号 US20050102604 申请日期 2005.04.08
申请人 STMICROELECTRONICS S.A. 发明人 AUDRAIN STEPHANE;GENTIT JEAN-MARC
分类号 G06F9/30;G06F9/38;G06F12/00;G06F15/00;G11C7/00;(IPC1-7):G06F15/00 主分类号 G06F9/30
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