发明名称 PLL CIRCUIT
摘要 <p>A PLL circuit capable of setting a frequency variable range at any one of a plurality of frequency variable ranges different from each other, wherein a setting operation to a frequency variable range corresponding to a target frequency can be carried out in a short time. Until a frequency in the frequency variable range matches or exceeds a target frequency, stage of the frequency variable range is altered with a relatively large variation width. Consequently, the time required for setting the frequency variable range can be shortened. When the target frequency is exceeded by an alteration (when the stage of frequency variable range is altered so as to stride over the target frequency), stage of the frequency variable range is altered with a relatively small variation width and the frequency variable range is brought closer to the target frequency. Frequency in the frequency variable range can be converged to the target frequency in a short time by repeating the operation.</p>
申请公布号 WO2005093956(A1) 申请公布日期 2005.10.06
申请号 WO2005JP05746 申请日期 2005.03.28
申请人 NEC CORPORATION;MAEDA, TADASHI;MATSUNO, NORIAKI 发明人 MAEDA, TADASHI;MATSUNO, NORIAKI
分类号 H03L7/099;H03L7/10;H03L7/18;H03L7/199;(IPC1-7):H03L7/18 主分类号 H03L7/099
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