| 摘要 |
This invention is generally concerned with digital-to-analogue converters and more particularly relates to techniques for reducing signal dependent loading of reference voltage sources used by these converters. A differential switched capacitor digital-to-analogue (DAC) circuit ( 500 ) comprises first and second differential signal circuit portions ( 500 a,b) for providing respective positive and negative signal outputs with respect to a reference level, and has first and second reference voltage inputs ( 112,114 ) for receiving respective positive and negative references. Each of said first and second circuit portions comprises an amplifier ( 102 a,b) with a feedback capacitor ( 104 a,b), a second capacitor ( 106 a,b), and a switch ( 108 a,b, 110 a,b) to switchably couple said second capacitor to a selected one of said reference voltage inputs to charge the second capacitor and to said feedback capacitor to share charge with the feedback capacitor. The switch of said first circuit portion is further configured to connect said second capacitor ( 106 a) of said first circuit portion to share charge with said feedback capacitor ( 104 b) of said second circuit portion; and the switch of said second circuit portion is further configured to connect said second capacitor ( 106 b) of said second circuit portion to share charge with said feedback capacitor ( 104 a) of said first circuit portion. This enables the second capacitors to in effect be alternately pre-charged to positive and negative signal-dependent nodes so that, on average, signal dependent loading of the references is approximately constant.
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