发明名称 Method and circuit device for the safe monitoring of the clock rates in a redundant system
摘要 The method involves comparing clock signals generated in separate generators (10.0,11.0). Clock signals from at least two channels are fed to independent counters (10.3,11.3) that count at the clock rate. At least two counters are read time synchronously by processors (10.2,11.2) that exchange the read values via an interface (12) and compare exchanged and read values. Error handling is performed if the difference between or a change in the quotient of exchanged and read counter values exceeds a threshold. An Independent claim is also included for a circuit for reliable monitoring of clock rates in a redundant system.
申请公布号 EP0992911(A3) 申请公布日期 2005.09.28
申请号 EP19990117691 申请日期 1999.09.08
申请人 DR. JOHANNES HEIDENHAIN GMBH 发明人 KERNER, NORBERT, DIPL.-ING.;SCHLICK, HELMUT;RAUTH, MICHAEL, DIPL.-ING.
分类号 G06F11/00;G06F11/16;G06F11/18;(IPC1-7):G06F11/16 主分类号 G06F11/00
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