| 摘要 |
The device for generating the bit line signal to enable a column transistor that is connected to a bit line and a local line in a semiconductor memory device includes at least a column decoder and a chain of connected inverters. The column decoder decodes a column address signal. The chain of connected inverters has an input terminal for receiving a first signal outputted from the column decoder and an output terminal for outputting a second signal to drive the column transistor. The second signal voltage is held substantially same as the first signal voltage for a predetermined time. After the predetermined time, the second signal voltage is held at a higher voltage than the first signal voltage to improve the current driving capacity of the column transistor. This increases the transmission speed of the signal transmitted from the bit line to the local input/output line.
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