发明名称 Semiconductor integrated circuit device
摘要 Logic circuits access a memory block by way of an access circuit. The memory block, which is formed of a mixed configuration of DRAMs and an SRAM, realizes the desired memory space. A data output register is provided at the output side of the SRAM so as to synchronize data output timing from the DRAMs with data output timing from the SRAM.
申请公布号 US2005207266(A1) 申请公布日期 2005.09.22
申请号 US20050075739 申请日期 2005.03.10
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KURODA NAOKI;NAKAI YUJI
分类号 G11C11/413;G11C7/10;G11C8/00;G11C11/401;G11C11/407;G11C11/412;(IPC1-7):G11C8/00 主分类号 G11C11/413
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