发明名称 WAFER LEVEL PACKAGE STRUCTURE AND ITS MANUFACTURING METHOD, AND ELEMENT DIVIDED FROM ITS WAFER LEVEL PACKAGE STRUCTURE
摘要 PROBLEM TO BE SOLVED: To provide a wafer level package structure which can minimize each individual package and which can laminate a substrate at a comparatively low temperature, and to provide a method of manufacturing the same. SOLUTION: The wafer level package structure includes a first substrate 1 having a plurality of functional elements 2 each having input and output electrodes, and a second substrate 11 in which the respective functional elements are laminated to be sealed. The second substrate has through holes 11a, 11B opposed to input and output electrodes 4a, 4b, and through conductors 21a, 22a filled in the through holes, respectively. The input and output terminals 21, 22 of the respective functional elements are constituted to include the through holes and the first conductors. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005251898(A) 申请公布日期 2005.09.15
申请号 JP20040058744 申请日期 2004.03.03
申请人 MITSUBISHI ELECTRIC CORP 发明人 YOSHIDA YUKIHISA;FUKUMOTO HIROSHI;HIRATA YOSHIAKI;SUEHIRO YOSHIYUKI
分类号 H01L23/12;H01L25/065;H01L25/07;H01L25/18;(IPC1-7):H01L23/12 主分类号 H01L23/12
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