发明名称 |
Data structures for efficient processing of IP fragmentation and reassembly |
摘要 |
Data structures, a method, and an associated transmission system for IP fragmentation and IP reassembly on network processors in order to minimize memory allocation requirements. Frame data for IP fragmentation or reassembly on a network processor is read into buffers to which are associated various control structures. The control structures permit IP fragmentation or reassembly to be accomplished without creating multiple copies of the frame or fragments.
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申请公布号 |
US6937606(B2) |
申请公布日期 |
2005.08.30 |
申请号 |
US20010839010 |
申请日期 |
2001.04.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BASSO CLAUDE;CALVIGNAC JEAN LOUIS;HEDDES MARCO C.;LOGAN JOSEPH FRANKLIN;VERPLANKEN FABRICE JEAN |
分类号 |
H04L12/56;H04L29/06;(IPC1-7):H04L12/56 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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