发明名称 Cache invalidation method and apparatus for a graphics processing system
摘要 A cache for a graphics system storing both an address tag and an identification number for each block of data stored in the data cache. An address and identification number of a requested block of data is provided to the cache, and is checked against all of the address and identification number entries present. A block of data is provided if both the address and the identification number of the requested data matches an entry in the cache. However, if the address of the requested data is not present, or if the address matches an entry but the associated identification number does not match, a cache miss occurs, and the requested graphics data must be retrieved from a system memory. The address and identification number are updated, and the requested data replaces the former graphics data in the data cache. As a result, a block of data stored in the cache having the same address as the requested data, but having data that is invalid, can be invalidated without invalidating the entire cache.
申请公布号 US6937246(B2) 申请公布日期 2005.08.30
申请号 US20040775299 申请日期 2004.02.09
申请人 MICRON TECHNOLOGY, INC. 发明人 MUNSHI AAFTAB;PETERSON JAMES R.
分类号 G06F12/08;G09G5/36;(IPC1-7):G09G5/36 主分类号 G06F12/08
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