发明名称 |
INTEGRATED CIRCUIT WITH PROTECTIVE MOAT |
摘要 |
A method of manufacturing an integrated circuit provides a substrate having a semiconductor device, and includes forming an intermetal dielectric layer over the substrate and the semiconductor device. A metal wire is formed above the semiconductor device and in contact therewith and a passivation layer is formed over the intermetal dielectric layer. A bond pad is formed connected to the metal wire. A protective moat, with sidewall passivation layer, is formed through the passivation layer and the intermetal dielectric layer, and is located between the metal wire and an outside edge of the integrated circuit. |
申请公布号 |
SG113528(A1) |
申请公布日期 |
2005.08.29 |
申请号 |
SG20040007165 |
申请日期 |
2004.12.07 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
ZHANG FAN;CHOK KHO LIEP;LEE TAE JONG;BU XIAO MEI;LUO MENG;SIN CHIAN YUH;FOONG YEE MEI;GOH LUO NA;HSIA LIANG-CHOO;CHONG HUEY MING |
分类号 |
H01L23/52;H01L21/3205;H01L21/822;H01L23/04;H01L23/31;H01L23/58;H01L27/04 |
主分类号 |
H01L23/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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