| 摘要 |
<P>PROBLEM TO BE SOLVED: To facilitate the manufacture of a memory device of nanometer scale. <P>SOLUTION: The memory devices (100, 600) include substrates (120, 220, 320, 420, 620, 720) and a plurality of self-aligning nano rectifying devices (102, 202, 302, 402) disposed on these substrates. Each nano rectifying device has a plurality of first electrode lines (132, 232, 332, 432, 632, 732) and a plurality of device structures (136, 236, 336, 436, 636) disposed on a plurality of the first electrode lines and forms a plurality of the self-aligning nano rectifying devices. Each device structure has at least one lateral direction dimension of less than about 75 nanometers. The memory device is also disposed on the device structure and is provided with a plurality of the self-aligning nano memory structures (104, 204, 304, 404) in the direction of the device structure and at least one direction. Further, the memory device is disposed on the nano memory structure and is electrically connected thereto, and is provided with a plurality of second electrode lines (152, 252, 352, 452, 652) self-aligned to the nano memory structures. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
