发明名称 |
Information processing system having performance measurement capabilities |
摘要 |
An information processing system capable of performance measurement by the use of a small amount of mounted hardware. The information processing system having central processors installed therein comprises a control circuit, and a performance measurement validation register for specifying whether a performance measurement function is valid or invalid. In a case where the validity of the measurement function has been specified by the register, the control circuit operates one loop in a duplex configuration as a performance measurement facility. At this time, counter #1-counter #3 are used as counters for totalizing performance information. On the other hand, in a case where the invalidity of the measurement function has been specified, both loops in the duplex configuration are operated as the central processors. At this time, the counter #1-the counter #3 are used as timer counters for controlling buses.
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申请公布号 |
US5651112(A) |
申请公布日期 |
1997.07.22 |
申请号 |
US19960605688 |
申请日期 |
1996.02.22 |
申请人 |
HITACHI, LTD.;HITACHI PROCESS COMPUTER ENGINEERING, INC. |
发明人 |
MATSUNO, ATSUSHI;NAITO, MASANORI;KOBAYASHI, HIROSHI;HORIE, MASANORI;SATO, HIDEKI;TANJI, MASAYUKI;WADA, SHIGEAKI;SAIKA, TOSHIMASA |
分类号 |
G06F11/28;G06F11/20;G06F11/32;G06F11/34;(IPC1-7):G06F11/00 |
主分类号 |
G06F11/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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