发明名称 Method for fabricating a notched gate structure of a field effect transistor
摘要 A method of fabricating a gate structure of a field effect transistor comprising a gate dielectric that is notched beneath a gate electrode using an isotropic plasma etch process. In one embodiment, the etch process uses a gas comprising a halogen gas (e.g., chlorine (Cl<SUB>2</SUB>)), a hydrocarbon gas (e.g., methane (CH<SUB>4</SUB>)), and an optional reducing gas (e.g., carbon monoxide (CO)), applies a substrate bias of not greater than 20 W, and maintains the substrate temperature of not less than 200 degrees Celsius.
申请公布号 US2005176191(A1) 申请公布日期 2005.08.11
申请号 US20030358970 申请日期 2003.02.04
申请人 APPLIED MATERIALS, INC. 发明人 KUMAR AJAY;NALLAN PADMAPANI C.
分类号 H01L21/28;H01L21/311;H01L21/3213;H01L21/8238;H01L29/423;H01L29/51;(IPC1-7):H01L21/336;H01L21/320;H01L21/44;H01L21/476;H01L21/823;H01L21/824 主分类号 H01L21/28
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