摘要 |
A method of fabricating a gate structure of a field effect transistor comprising a gate dielectric that is notched beneath a gate electrode using an isotropic plasma etch process. In one embodiment, the etch process uses a gas comprising a halogen gas (e.g., chlorine (Cl<SUB>2</SUB>)), a hydrocarbon gas (e.g., methane (CH<SUB>4</SUB>)), and an optional reducing gas (e.g., carbon monoxide (CO)), applies a substrate bias of not greater than 20 W, and maintains the substrate temperature of not less than 200 degrees Celsius.
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