| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that a duty of an output signal of a data slicer is distorted and abnormality occurs in bit synchronism that is detected in a bit synchronizing circuit, if a time constant of the data slicer changes. SOLUTION: A signal width acquisition section 12 acquires, as a signal width, a length of a term wherein a signal level of an input signal 100 is fixed, and a signal width history management section 13 manages a history of the signal width. A determination section 15 determines based on the acquired signal width and the history of the signal width whether or not correction is to be performed. If the correction is determined to be performed, the determination section 15 outputs a correcting instruction 105 just for a time of a correction amount 204 outputted from a correction amount management section 24. While the correcting instruction 105 is outputted, a correction performance section 16 corrects a delay input signal 101 outputted from a delay section 11. Thus, correction can be properly performed at high speed by deciding whether or not correction is to be performed based on the history of the signal width. COPYRIGHT: (C)2005,JPO&NCIPI
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