发明名称 Level shifter and flat panel display
摘要 In a level shifter, first and second PMOS transistors are connected in series between first and second power sources for supplying first high level and low level voltages, respectively, and a capacitor is formed between a contact point of the first and second transistors and the second transistor's gate. A third PMOS transistor is diode-connected and connected between the first and second transistors' gates. When a second low level voltage is input to the first transistor's gate, a second high level voltage is output to the contact point according to an on resistance ratio of the first and second transistors. When a first high level voltage is input to the first transistor's gate, the second transistor is bootstrapped according to the voltage charged to the capacitor so that a first low level voltage is substantially output to the contact point. Since the level shifter outputs voltages substantially corresponding to voltages which the first and second power sources supply respectively, a range of the output voltage may be extended.
申请公布号 US2005140421(A1) 申请公布日期 2005.06.30
申请号 US20050040412 申请日期 2005.01.21
申请人 SAMSUNG SDI CO., LTD. 发明人 SHIN DONG-YONG
分类号 G09G3/20;G09G3/00;H03K19/017;H03K19/0185;(IPC1-7):H03L5/00 主分类号 G09G3/20
代理机构 代理人
主权项
地址