发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device utilizing the electrode of a capacitive element as wiring or a resistor wherein the capacitive coupling between the lower electrode and the upper electrode is suppressed without increasing the height of the capacitive element. <P>SOLUTION: The semiconductor device has a structure wherein a silicon oxide film 3 is embedded within a first groove 2 as an element isolation region in a p-type silicon substrate 1, and an n-type polycrystalline silicon resistor 6 is embedded within a second groove 5 further formed in that silicon oxide film 3. The second groove 5 is not completely filled up with the polycrystalline silicon resistor 6 and has a recess in the surface thereof, and an insulating layer 7 is formed in the recess so that the surface of the insulating layer 7 and the surface of the substrate 1 are held at the same level. Further, an upper electrode of a polycide structure is formed to form the capacitive element together with the polysilicon resistor 6 and a capacitive insulating film 10. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005175193(A) 申请公布日期 2005.06.30
申请号 JP20030413004 申请日期 2003.12.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIMAZAKI TOYOYUKI
分类号 H01L23/52;H01L21/3205;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 H01L23/52
代理机构 代理人
主权项
地址