| 发明名称 |
Interrupt masking control |
| 摘要 |
A processor core 4 is provided with an interrupt controller 22 which serves to set an interrupt mask bit F and a hardware control when an interrupt fiq occurs. A masking control signal NMI serves to either allow or prevent the software clearing of the interrupt mask bit F.
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| 申请公布号 |
US2005138257(A1) |
申请公布日期 |
2005.06.23 |
| 申请号 |
US20040886576 |
申请日期 |
2004.07.09 |
| 申请人 |
ARM LIMITED |
发明人 |
BURDASS ANDREW;SEAL DAVID J. |
| 分类号 |
G06F9/48;G06F9/46;G06F13/24;(IPC1-7):G06F13/24 |
主分类号 |
G06F9/48 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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