发明名称 System and method for executing tests on an integrated circuit design
摘要 The present invention is generally directed to a system and method for performing evaluation tests on a circuit design. Specifically, the present invention is directed to a system and method that controllably executes test routines on a netlist file. Broadly, the system of the present invention is a software package that is configured to execute a wide variety of tests, checks, or evaluations on a circuit design, as defined by a netlist file. An inventive aspect lies in the controllable execution of the various tests, checks, and evaluations, whereby certain tests may be omitted. In accordance with this novel aspect of the invention, the program may look to one or more files that contain a listing of tests that would otherwise be performed by the program, but which the program omits if listed in any of the one or more exclusion files. Preferably, the system employs two such exclusion files: one which is located in a "local" directory (i.e., the same location from which the program is being launched), and a "global" exclusion file, which is located in a predetermined, or specified, location.
申请公布号 US6910193(B1) 申请公布日期 2005.06.21
申请号 US19990273820 申请日期 1999.03.22
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 MCBRIDE JOHN G
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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