发明名称 Flip-flop insertion in a circuit design
摘要 A method and apparatus for inserting flip-flops in a circuit design between a driver and one or more receiver(s) comprising generating a candidate solution to assign the flip-flop at the node in the circuit, calculating a margin at the driver, calculating the margin at the receiver, and inserting the flip-flop at the node to simultaneously maximize the margin at the driver and the margin at the receiver. Furthermore, the method and apparatus determines whether to insert a second flip-flop at a second node in the circuit, and inserting the second flip-flop at the second node in the circuit such that a delay between the flip-flop and the second flip-flop is substantially equal to a clock period.
申请公布号 US6910195(B2) 申请公布日期 2005.06.21
申请号 US20030359380 申请日期 2003.02.05
申请人 INTEL CORPORATION 发明人 AKKIRAJU NATARAJ
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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