发明名称 |
MULTI-VALUED OR SINGLE STRENGTH SIGNAL DETECTION IN A HARDWARE DESCRIPTION LANGUAGE |
摘要 |
A method, module, and program product for detecting signal strengths in a hardware description language, such as Verilog, that does not provide for such detection. The method includes the steps of creating a wired net configuration that provides for a data input signal and a controlled reference signal; varying the controlled reference signal based on a desired signal strength to be detected; and comparing the input signal with the controlled reference signal to determine if the desired signal strength has been detected.
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申请公布号 |
US2005091636(A1) |
申请公布日期 |
2005.04.28 |
申请号 |
US20030605747 |
申请日期 |
2003.10.23 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GRUPP RICHARD J.;MONROE CRAIG M.;SCHUPPE RAYMOND W. |
分类号 |
G06F3/00;G06F9/44;G06F17/50;(IPC1-7):G06F9/44 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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