发明名称 Semiconductor test apparatus
摘要 There is disclosed a semiconductor test apparatus enabling writing into an information write space of a block including a failure cell into which block writing is inhibited partially or entirely by the bad block mask function and the fail loop back function. A pattern generation block outputs to an output controller a release signal (S 4 ) for releasing the write inhibit instruction defined by an inhibit signal (S 3 ) and a mask signal (SI). When the output controller receives the release signal (S 4 ), the output controller outputs a write enable signal (WE) to an MUT ( 4 ).
申请公布号 US6885956(B2) 申请公布日期 2005.04.26
申请号 US20030477779 申请日期 2003.11.12
申请人 ADVANTEST CORP. 发明人 BABA TADAHIKO
分类号 G11C29/56;(IPC1-7):G01R31/28 主分类号 G11C29/56
代理机构 代理人
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