发明名称 Processor and method of booting same
摘要 A processor and method of booting the processor in which dispensable circuit operation is eliminated to reduce power consumption. A first expected check-sum value relating to instructions and table data and a second expected check-sum value relating only to instructions are held in a boot ROM. When power is turned on, if a power-on determination circuit determines that the power has been turned on for a system, a read selection circuit loads instructions and the table data into an instruction storage memory and a table data storage memory and a check-sum performing circuit performs check-sum using the first expected check-sum value. In the case where the power has been turned on for periodic operation, instructions are loaded into the instruction storage memory, check-sum is performed using the second expected check-sum value, and table data that was saved in a backup memory is loaded into the table data storage memory. Thus, the time required for loading from the boot ROM for the periodic operation decreases.
申请公布号 US6883092(B2) 申请公布日期 2005.04.19
申请号 US20020157992 申请日期 2002.05.31
申请人 FUJITSU LIMITED 发明人 SASAKI TAKEO;KUROIWA KOICHI;TANIGUCHI SHOJI;KASHIWAGI TAKANOBU
分类号 G06F11/10;G06F1/32;G06F9/445;(IPC1-7):G06F11/00 主分类号 G06F11/10
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