Microprocessor runaway monitoring control circuit

摘要

A microprocessor runaway monitoring control circuit with which self-diagnosis of a watchdog timer WDT can be carried out safely and cheaply even during operation of the microprocessor (CPU). A microprocessor 101 supplies first and second watchdog clearing signals WD 1 and WD 2 to first and second watchdog timers WDT 1 and WDT 2 , and when the both of the watchdog clearing signals WD 1 and WD 2 stop, the microprocessor 101 is reset by way of a logical connector circuit 122 . The microprocessor 101 has failure diagnosing means 103 which intentionally stops the first watchdog clearing signal WD 1 and diagnoses the response of the first watchdog timer WDT 1 on the basis of a monitor signal MN 1 and stops the second watchdog clearing signal WD 2 and diagnoses the response of the second watchdog timer WDT 2 on the basis of a monitor signal MN 2 , whereby diagnosis of the watchdog timers WDT 1 , WDT 2 is carried out without the microprocessor 101 being stopped.