Synchronization of multiphase synthetic ripple voltage regulator

摘要

A multiphase ripple voltage regulator generator employs a hysteretic comparator referenced to upper and lower voltage thresholds. The hysteretic comparator monitors a master ripple voltage waveform developed across a capacitor supplied with a current proportional to the difference between the output voltage and either the input voltage or ground. The output of the hysteretic comparator generates a master clock signal that is sequentially coupled to PWM latches, the states of which define the durations of respective components of the synthesized ripple voltage. A respective PWM latch has a first state initiated by a selected master clock signal and terminated by an associated phase voltage comparator that monitors a respective phase node voltage.