发明名称 |
Computer instruction compression |
摘要 |
<p>A computer system has compact instructions avoiding the need for redundant bit locations underlying simple decoding of instructions. The computer system has logic circuitry which is arranged to respond to an instruction set comprising a plurality of selectable instructions of different bit lengths. Each instruction is based on a format of predetermined bit length and a predetermined sequence of instruction fields each of a respective predetermined bit length. Some instructions omit a selected one of the fields and include an identifier of less bit length than the omitted field to indicate which field is omitted. Thus the bit length of the instruction is compressed. There is also described a method of compressing instruction bit lengths, a method of generating instructions for use in a computer system and a method for operating a computer.</p> |
申请公布号 |
EP0689128(B1) |
申请公布日期 |
2005.03.30 |
申请号 |
EP19950303608 |
申请日期 |
1995.05.26 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
MAY, MICHAEL DAVID;SIDWELL, NATHAN MACKENZIE;STURGES, ANDREW CRAIG |
分类号 |
G06F9/30;G06F9/32;(IPC1-7):G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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