SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor memory device is provided to reduce or eliminate a difference in bit line load resistance due to the location of a memory element by regulating the source-side and drain-side bit line load resistance of a memory cell, and to reduce or eliminate a variation in resistance value from a main bit line to a sub bit line. A semiconductor memory device comprises plural memory elements; more than one of bit line in which a memory operation is performed; a load resistance regulating circuit(2) for changing a resistance value in order to reduce or eliminate a difference in bit line load resistance due to a location of the memory element. Wherein, the load resistance regulating circuit(2) regulates a resistance value based on address information in order to reduce or eliminate the difference in a load resistance of a bit line in a row direction.