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发明名称
整合快闪记忆体与高电压元件之制造方法
摘要
一种整合快闪记忆体与高电压元件之制造方法,可使快闪记忆体之氧化层制造与高电压元件之氧化层制造整合于同一制程中。首先,使快闪记忆体位于浮置闸极与控制闸极间的氧化层长成一厚度。接着,形成高电压元件之闸极氧化层,并且在高电压元件之闸极氧化层的形成步骤中,也同时增厚之前所形成的氧化层至所需厚度。如此可避免快闪记忆体区需遭受另外的热制程而影响其品质。
申请公布号
TW200509317
申请公布日期
2005.03.01
申请号
TW092122925
申请日期
2003.08.20
申请人
台湾积体电路制造股份有限公司
发明人
吴浩铨;曾健庭;何大椿
分类号
H01L21/8247
主分类号
H01L21/8247
代理机构
代理人
蔡坤财
主权项
地址
新竹县新竹科学工业园区园区三路121号
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