Integrated circuit e.g. memory circuit, with test circuit for read-out of fault data during test mode supplying fault data to alternate data outputs in response to different read commands

摘要

The integrated circuit (10) has fault data from the integrated circuit delivered to 2 data outputs, with an address and a read command applied to the integrated circuit, for read-out of fault data corresponding to the address at one of the data outputs, the test circuit supplying the fault data to one or other of the data outputs, while the other data output is switched into a high-ohmic state, in response to 2 different read commands. Also included are Independent claims for the following: (a) a test system for testing a number of integrated circuits; (b) a method for read-out of fault data from integrated circuits tested in common by an integrated circuit test system.