发明名称
摘要 Desired signal power measured at a desired signal power measuring circuit 105 is averaged over a plurality of slots by an averaging circuit 106 to reduce a power error in desired signal power of each slot. An SIR measuring circuit 108 calculates SIR(n)of each slot from the average value of desired signal power in the plurality of slots and the measured value of interference signal power of each slot, and a TPC generating circuit 109 makes a comparison between SIR(n) of each slot and a threshold value, and generates transmission power control information. This makes it possible to control transmission power for each slot with high accuracy in asymmetrical communication. <IMAGE>
申请公布号 JP3621310(B2) 申请公布日期 2005.02.16
申请号 JP19990286317 申请日期 1999.10.07
申请人 发明人
分类号 H04L1/00;H04B7/005;H04B7/26;H04J3/00;H04W52/08;H04W52/22;H04W52/24 主分类号 H04L1/00
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