| 摘要 |
PURPOSE: A device for generating clock is provided to have a clock without any jitter or phase noise and to obtain flexible and various frequency of clock by using an accurate DDS(direct digital synthesizer) for changing FTW(frequency tuning word). CONSTITUTION: A device for generating clock comprises a DDS(direct digital synthesizer)(100) consisting of a 10X PLL multiplier(101) for converting a system reference clock into DDS operating clock signal of 196.608MHz after receiving the system reference clock of 19.6608MHz; a phase accumulator(102) operated by the DDS operating clock signal from the 10X PLL multiplier, for receiving FTW(frequency tuning word) and outputting specific frequency by accumulating the phase; a phase-to-amplitude converter(103) operated by the DDS operating clock signal from the 10X PLL multiplier, for receiving the specific frequency from the phase accumulator, and mapping and outputting a corresponding phase amplitude; a digital-to-analog converter(104) operated by the DDS operating clock signal from the 10X PLL multiplier, for receiving the phase-mapped clock signal from the phase-to-amplitude converter, and outputting analog DDS output frequency by converting the phase-mapped clock signal into an analog signal; a band pass filter(200) for receiving the DDS output frequency from the digital-to-analog converter of the DDS, and filtering and outputting only a wanted band from the DDS output frequency; a comparator(300) for receiving the filtered DDS output frequency from the band pass filter, and converting that into a square wave of low jitter.
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