METHOD FOR FORMING INTERLAYER DIELECTRIC IN SEMICONDUCTOR ELEMENT CAPABLE OF PREVENTING GENERATION OF VOIDS AND BRIDGES IN THE INTERLAYER DIELECTRIC

摘要

PURPOSE: A method for forming an interlayer dielectric in a semiconductor element is provided to stabilize operation of the semiconductor element by preventing generation of voids and bridges in the interlayer dielectric during forming of a subsequent landing plug poly. CONSTITUTION: A gate electrode(30) is formed on a semiconductor substrate having a device isolation film formed thereon. A nitride layer spacer(31) is formed on a side of the gate electrode. A first interlayer dielectric(33) is formed on a face of the result by using a flow-fill material. A CMP(Chemical Mechanical Polishing) is performed on the first interlayer dielectric until an upper portion of the gate electrode is exposed. An annealing is performed on the first interlayer dielectric. A second interlayer dielectric(35) is formed on the annealed first interlayer dielectric.