发明名称 |
Coding unit and data store for data recording - selects resynchronisation data bytes to optimise Slice Level Margin |
摘要 |
<p>A coding unit encodes the data for recording. The coding unit contains a first section to introduce resynchronisation bytes between two data blocks in a data field, where the data is in a predetermined modulation code producing DC components. This is converted into a pulse width modulation (PWM) format. When a clock slip occurs within the data field, a second section calculates a digital sum for a datablock, as the difference between the sum of logic 'I's and logic 'O's in the PWM data. A third section controls the first section, so that resynchronisation bytes with values to minimise the digital sum are introduced into the data block.</p> |
申请公布号 |
DE19655172(B4) |
申请公布日期 |
2005.01.27 |
申请号 |
DE1996155172 |
申请日期 |
1996.01.24 |
申请人 |
FUJITSU LTD., KAWASAKI |
发明人 |
YANAGI, SHIGENORI;FURUTA, SATOSHI |
分类号 |
G11B20/14;G11B27/30;(IPC1-7):G11B20/10 |
主分类号 |
G11B20/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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