发明名称 |
STRESS-REDUCED POLYMETAL GATE ELECTRODE CAPABLE OF REDUCING MECHANICAL STRESS GENERATED FROM GATE STACK IN POST THERMAL PROCESS AND FABRICATING METHOD THEREOF |
摘要 |
PURPOSE: A stress-reduced polymetal gate electrode and a fabricating method thereof are provided to improve a refresh characteristic and reliability by implanting ions into a low resistant metal to adjust a thermal expansion coefficient thereof. CONSTITUTION: A gate insulating layer(302) is formed on a semiconductor substrate(301). A gate stack(300) is formed on the gate insulating layer. The gate stack includes a polysilicon layer(303) as a bottom layer, a hardmask insulating layer(307) as a top layer, and a metal layer(305) formed therebetween. The metal layer has a minimum thermal expansion coefficient difference in comparison with the hardmask insulating layer and the polysilicon layer. An ion implantation buffer layer(306) is formed on the metal layer to perform a buffering function in an impurity implantation process.
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申请公布号 |
KR20050009466(A) |
申请公布日期 |
2005.01.25 |
申请号 |
KR20030048788 |
申请日期 |
2003.07.16 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHO, HEUNG JAE;LIM, KWAN YONG |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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