METHOD FOR FORMING DUAL DAMASCENE PATTERN OF SEMICONDUCTOR DEVICE TO PREVENT VIA HOLE POISONING PHENOMENON AND ETCH STOP PHENOMENON IN ISOLATED VIA HOLE

摘要

PURPOSE: A method for forming a dual damascene pattern of a semiconductor device is provided to prevent a via hole poisoning phenomenon and an etch stop phenomenon in an isolated via hole by depositing a liner oxide layer along the upper surface of a resultant structure after a via hole is formed and by preventing an etch stop layer or diffusion barrier layer made of a nitride material from directly coming in contact with a photoresist pattern formed by a subsequent process. CONSTITUTION: A semiconductor substrate(10) having an underlying metal interconnection(16) is prepared. A diffusion barrier layer(18), the first interlayer dielectric(14) and the second interlayer dielectric(20) are formed on the resultant structure. The first and second interlayer dielectrics are patterned to form a via hole by an etch process using a via hole etch mask. A liner oxide layer is formed along the inner surface of the via hole. An ARC(anti-reflective coating) is deposited to fill the via hole. A trench is formed by an etch process using a trench etch mask. A cleaning process is performed to make the first and second interlayer dielectrics have high etch selectivity, thereby exposing the diffusion barrier layer. The exposed diffusion barrier layer is eliminated to expose a part of the underlying metal interconnection.