发明名称 METHOD FOR FABRICATING TRANSISTOR OF SEMICONDUCTOR DEVICE TO DECREASE ELECTRICAL THICKNESS OF GATE OXIDE LAYER AND REDUCE LEAKAGE CURRENT THROUGH GATE INSULATION LAYER
摘要 PURPOSE: A method for fabricating a transistor of a semiconductor device is provided to decrease the electrical thickness of a gate oxide layer and reduce a leakage current through a gate insulation layer by forming the gate oxide layer of a stack structure of an oxynitride layer, an oxide layer and an oxynitride layer. CONSTITUTION: The first rapid thermal oxynitride layer(205) is formed on a semiconductor substrate(201). The second rapid thermal oxynitride layer(208) is formed between the first rapid thermal oxynitride layer and the semiconductor substrate. A gate electrode material layer is formed on the second rapid thermal oxynitride layer. By an etch process, the gate electrode material layer, the second rapid thermal oxynitride layer and the first rapid thermal oxynitride layer are patterned to form a gate oxide layer composed of the first and second rapid thermal oxynitride layers and a gate electrode(210a,210b). A source/drain(216a,216b,216c,216d) is formed.
申请公布号 KR20050004676(A) 申请公布日期 2005.01.12
申请号 KR20030044942 申请日期 2003.07.03
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 RYOO, DOO YEOL
分类号 H01L27/092;(IPC1-7):H01L27/092 主分类号 H01L27/092
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