发明名称 |
Semiconductor memory device and electronic device |
摘要 |
In the semiconductor memory device of the invention, even in the case of generation of a write access request or a refresh request in advance, an access control module preferentially executes a read access operation in response to a read access request generated by a change of an external access timing signal to an inactive level while a write enable signal supplied from an external device is at an inactive level. This arrangement desirably eliminates the long rate restriction of the semiconductor memory device.
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申请公布号 |
US2005002255(A1) |
申请公布日期 |
2005.01.06 |
申请号 |
US20040836206 |
申请日期 |
2004.05.03 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
MIZUGAKI KOICHI;OTSUKA EITARO |
分类号 |
G11C11/403;G11C11/406;G11C11/4076;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/403 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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