发明名称 |
Interface for prototyping integrated systems |
摘要 |
An interface is described which has at least one chip side port with a first plurality of pins for conveying fields of a packet and first and second circuit side ports each port having a set of pins with a lower number than the first set of pins in the chip side port. The interface is constructed so that interrupt signals from an off-chip circuit can be conveyed on-chip in a manner such that the interrupt signals are indistinguishable from interrupt signals received from on-chip modules connected to an on-chip communication path. The same principle is applicable to power-down signals.
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申请公布号 |
US2005005226(A1) |
申请公布日期 |
2005.01.06 |
申请号 |
US20030456860 |
申请日期 |
2003.06.06 |
申请人 |
RYAN STUART;JONES ANDREW |
发明人 |
RYAN STUART;JONES ANDREW |
分类号 |
G06F13/24;G06F13/38;G06F17/50;H03M13/00;(IPC1-7):G06F17/50 |
主分类号 |
G06F13/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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