发明名称 Integrated circuit design for both input output limited and core limited integrated circuits
摘要 Various integrated circuits (ICs) are provided. One IC includes bonding pads and an input output (I/O) region surrounding a core region. The I/O region includes I/O cells having a width approximately equal to or less than a width of the bonding pads. The IC also includes core logic arranged within the I/O region. Another IC includes four rows of bonding pads. Each row is arranged parallel to a different side of a core region. I/O sub-regions are arranged proximate each side of the core region. Each I/O sub-region includes I/O cells and core logic. An additional IC includes a first I/O region surrounding a core region and a second I/O region surrounding the first I/O region. The IC also includes bonding pads arranged outside of I/O cells in the first and second I/O regions. A width of the I/O cells is approximately equal to a pitch of the bonding pads.
申请公布号 US6836026(B1) 申请公布日期 2004.12.28
申请号 US20030614402 申请日期 2003.07.03
申请人 LSI LOGIC CORPORATION 发明人 ALI ANWAR;LAU TAUMAN T.;YOUNG MAX M.
分类号 H01L23/485;H01L27/02;H01L27/118;(IPC1-7):H01L23/48 主分类号 H01L23/485
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