发明名称 MEMORY CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To inhibit the reading of contents stored in built-in memories to the external even when a memory such as an external ROM is rewritten by a third person. SOLUTION: A memory control circuit is provided with a CPU 11, memories 12a, 12b for storing information including a program to be executed by the CPU 11, a program area monitoring circuit 30 for monitoring an area accessed by the program executed by the CPU 11, an access inhibit setting register 20 for storing access inhibit setting information for inhibiting accesses to the memories 12a, 12b from the external, a memory access inhibit signal generation circuit 40 for generating memory access inhibit signal inhibiting accesses to the memories 12a, 12b on the basis of the monitored result of the program area monitoring circuit 30 and the access inhibit setting information stored in the access inhibit setting register 20, and a memory access control circuit 50 for controlling the reading of information stored in the memories 12a, 12b to the external on the basis of the memory access inhibit signal. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004355383(A) 申请公布日期 2004.12.16
申请号 JP20030152969 申请日期 2003.05.29
申请人 TOSHIBA CORP;TOSHIBA LSI SYSTEM SUPPORT KK;TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP 发明人 MIZUTANI TATSUO;KOMINE YUJI
分类号 G06F12/14;(IPC1-7):G06F12/14 主分类号 G06F12/14
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