发明名称 Wiring design method and system for electronic wiring boards
摘要 An object of the present invention is to provide a wiring design system which is advantageous when applied to wiring boards having various wiring restrictions, wherein the system shows a rough wiring plan at the floor plan stage so as to complete a wiring design satisfying the wiring restrictions in a short period of time while evaluating the congestion degree of the wiring. The wiring design system performs the steps of: inputting logical connection information for wiring parts and signal group information for handling the connection information as a signal group; handling the signal group as a wiring unit for a wiring path search and dividing the signal group into smaller groups; and determining an optimum path in such a way that the divided smaller groups run adjacent to one another whenever appropriate. Furthermore, when dividing the signal group, the wiring design system evaluates the layout of the parts and the congestion degree of the wiring.
申请公布号 US2004250230(A1) 申请公布日期 2004.12.09
申请号 US20040803944 申请日期 2004.03.19
申请人 ITOU KATSUYUKI;SASAKI TETSUO;OKADA TOSHIAKI 发明人 ITOU KATSUYUKI;SASAKI TETSUO;OKADA TOSHIAKI
分类号 G06F9/455;G06F17/50;H03K17/693;H05K3/00;(IPC1-7):H03K17/693 主分类号 G06F9/455
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