发明名称 APPARATUS AND METHOD FOR PROCESSING SIGNAL
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an apparatus and a method for processing a signal which can easily tune the frequency of a clock for operation with necessary and sufficient frequency for arithmetic operation and which can reduce unnecessary power consumption in an arithmetic operation. <P>SOLUTION: The frequency of the clock SN1 for arithmetic operation generated by a means N1 of creating a clock for operation is controlled in accordance with the amount of arithmetic operation by an operation means N2 so as to match the necessary and sufficient clock frequency to the amount of its arithmetic operation by control means N5 while the operation means N2 performs arithmetic operation. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2004348183(A) 申请公布日期 2004.12.09
申请号 JP20030141221 申请日期 2003.05.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HATANAKA NORIO;NAKAMURA YUKIO
分类号 G06F1/32;G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/32
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