摘要 |
A configuration of sub-comparators for use within an analog to digital conversion circuit is disclosed. A number of the sub-comparators are adapted to receive equalization and power down control signals. In one embodiment, several of the sub-comparators are cascaded together in the analog to digital conversion circuit. An equalization signal and a power down control signal are applied to at least some of the sub-comparators enabling the sub-comparators to attenuate or eliminate offset voltage and environmental noise associated with the signal to be sampled. Furthermore, in accordance with another aspect, the analog to digital conversion circuit includes a latch type differential sub-comparator, which can attenuate or eliminate output levels of the sub-comparators from residing in an unstable input region of the digital converter.
|